1. Field of the Invention
The present invention is related to a liquid crystal display system and a pixel-charge delay circuit applied to a liquid crystal display system, and particularly to a liquid crystal display system and a pixel-charge delay circuit applied to a liquid crystal display system for improving display color mismatch.
2. Description of the Prior Art
In the prior art, a gate driving circuit of a liquid crystal display panel utilizes output signals of scan lines G1, G2, G3, G4, G5, . . . to turn on thin film transistors corresponding to the scan lines G1, G2, G3, G4, G5, . . . in turns. A source driving circuit of the liquid crystal display panel converts display data into a data voltage, and then charges/discharges a corresponding pixel of the liquid crystal display panel to a voltage corresponding to a gray level. The gate driving circuit turns on next row thin film transistors when last row thin film transistors are turned off completely. However, in order to prevent mistaken charging of thin film transistors, an output enable signal OE is used for adjusting a time interval between an output signal of a scan line and an output signal of an adjacent scan line. Please refer to FIG. 1. FIG. 1 is a diagram illustrating an output signal of a scan line G4 being at a logic-low voltage VGL when the output enable signal OE is enabled.
The scan lines of the liquid crystal display panel are not ideal transmission lines, and an impedance of each scan line may cause an output signal of the each scan line not to drop to the logic-low voltage VGL immediately during the output enable signal OE being enabled, so as to form a weak logic-low voltage. When the source driving circuit outputs a latch data signal LD to charge pixels of the scan line Gm, pixels of the scan line Gm-1 are also charged due to the weak logic-low voltage. Thus, the liquid crystal display panel may exhibit color mismatch. Please refer to FIG. 2. FIG. 2 is a diagram illustrating mistaken charging of the pixels due to the weak logic-low voltage. As shown in FIG. 2, the source driving circuit starts to charge the pixels of the scan line Gm when a negative edge of the latch data signal LD appears. Meanwhile, the source driving circuit also charges the pixels of the scan line Gm-1 due to the weak logic-low voltage of the scan line Gm-1, resulting in the color mismatch of the liquid crystal display panel.